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ICSE 2019
Sat 25 - Fri 31 May 2019 Montreal, QC, Canada

Welcome to the website of the FormaliSE 2019 conference!

The software industry has a long-standing and well-earned reputation for failing to deliver high-quality software. Much progress has been achieved from the early days of software development; still, nowadays, even considering the state of the art of the technologies used, the success of software projects is often not guaranteed. Many of the approaches used for developing large, complex software system are still not able to ensure the correct behavior – and the general quality – of the delivered product, despite the efforts of the (often very qualified and skilled) software engineers involved. This is where formal methods can play a significant role. Indeed, they have been developed to provide the means for greater precision and thoroughness in modeling, reasoning about, validating, and documenting the various aspects of software systems during their development. When carefully applied, formal methods can aid all aspects of software creation: user requirement formulation, design, implementation, verification/testing, and the creation of documentation.

However, after decades of research, and despite significant advancement, formal methods are still not widely used in industrial software development. We believe that a closer integration of formal methods in software engineering can help increase the quality of software applications, and at the same time highlight the benefits of formal methods in terms also of the generated return on investment (ROI).

The main objective of the conference is to foster the integration between the formal methods and the software engineering communities, to strengthen the – still too weak – links between them, and to stimulate researchers to share ideas, techniques, and results, with the ultimate goal to propose novel solutions to the fraught problem of improving the quality of software systems.

Originally a successful satellite workshop of ICSE, since 2018 FormaliSE is organised as a 1-day conference co-located with ICSE. FormaliSE 2019 will take place on May 27th, 2019, in Montreal, Canada.

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Mon 27 May

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08:40 - 10:30
Session 1FormaliSE at Sainte-Catherine
Chair(s): Matteo Rossi Politecnico di Milano
08:40
10m
Day opening
Welcome by the Chairs
FormaliSE
C: Stefania Gnesi Istituto di Scienza e Tecnologie dell'Informazione "Alessandro Faedo"
08:50
25m
Full-paper
Epistemic Model Checking of Distributed Commit Protocols with Byzantine faults
FormaliSE
Omar Bataineh NTU, Mark Reynolds The Univeristy of Western Australia
09:15
25m
Full-paper
Clock Reduction in Timed Automata while Preserving Design Parameters
FormaliSE
Beyazit Yalcinkaya Middle East Technical University, Ebru Aydin Gol Middle East Technical University
09:40
25m
Full-paper
Rigorous Design and Deployment of IoT Applications
FormaliSE
Ajay Krishna Inria Grenoble, France, Michel Le Pallec Nokia Bell Labs, Radu Mateescu INRIA, Ludovic Noirie Nokia Bell Labs, Gwen Salaün University of Grenoble Alpes
10:05
25m
Full-paper
Static Analysis for Worst-Case Battery Utilization
FormaliSE
10:30 - 11:00
Coffee breakFormaliSE at Foyer
10:30
30m
Coffee break
Coffee break
FormaliSE

12:30 - 14:00
12:30
90m
Lunch
Lunch
FormaliSE

14:00 - 15:30
Session 3FormaliSE at Foyer
Chair(s): Eunsuk Kang Carnegie Mellon University
14:00
25m
Full-paper
Parallelizable Reachability Analysis Algorithms for Feed-Forward Neural Networks
FormaliSE
Hoang-Dung Tran Vanderbilt University, Patrick Musau Vanderbilt University, Diego Manzanas Lopez Vanderbilt University, Xiao Dong Yang Vanderbilt University, Luan Nguyen University of Pennsylvania, Weiming Xiang Vanderbilt University, Taylor T Johnson Vanderbilt University
14:25
15m
Short-paper
Towards Sampling and Simulation-Based Analysis of Featured Weighted Automata
FormaliSE
Maxime Cordy SnT, University of Luxembourg, Axel Legay , Sami Lazreg Visteon Electronics and Universite Cote d Azur, Philippe Collet University of Nice
14:40
25m
Full-paper
Verifying Channel Communication Correctness for a Multi-Core Cooperatively Scheduled Runtime Using CSP
FormaliSE
Jan Pedersen University of Nevada Las Vegas, Kevin Chalmers Edinburgh Napier University
15:05
25m
Full-paper
A Generalized Program Verification Workflow Based on Loop Elimination and SA Form
FormaliSE
Cláudio Belo Lourenço LRI, Université Paris-Sud & INRIA Saclay, Maria João Frade HASLab/INESC TEC & Universidade do Minho, Portugal, Jorge Sousa Pinto HASLab/INESC TEC & Universidade do Minho, Portugal
15:30 - 16:00
Coffee breakFormaliSE at Foyer
15:30
30m
Coffee break
Tea break
FormaliSE

16:00 - 18:00
Session 4FormaliSE at Sainte-Catherine
Chair(s): Stéphanie Challita Inria, France
16:00
25m
Full-paper
Modular Synthesis of Verified Verifiers of Computation with STV Algorithms
FormaliSE
Milad K. Ghale The Australian National University, Dirk Pattinson Australian National University, Michael Norrish Data61 at CSIRO, Australia / Australian National University, Australia
16:25
15m
Short-paper
A Vision for Helping Developers Use APIs by Leveraging Temporal Patterns
FormaliSE
Erick Raelijohn University of Montreal, Michalis Famelis Université de Montréal, Houari Sahraoui Université de Montréal
16:40
25m
Full-paper
A Proof-Producing Translator for Verilog Development in HOL
FormaliSE
Andreas Lööw Chalmers University of Technology, Magnus O. Myreen Chalmers University of Technology, Sweden
17:05
25m
Full-paper
On the Formalization of Importance Measures using HOL Theorem Proving
FormaliSE
Waqar Ahmad Carnegie Mellon University, Shahid Ali Murtza National University of Sciences and Technology, Osman Hasan Concordia University, Canada, Sofiene Tahar Concordia University
17:30
30m
Day closing
Discussion/closing
FormaliSE
C: Nico Plat Thanos

Call for Papers

We invite you to submit a contribution to FormaliSE. Areas of interest include but are not limited to:

  • verification and validation of cyber-physical systems, IoT systems, and autonomous systems;
  • integration of FMs with the rest of the software development lifecycle;
  • use of formal methods in Continuous Integration & Deployment contexts;
  • rigorous software engineering approaches and their tool support;
  • model-based approaches, including model-driven development;
  • scalability of FM applications;
  • prescriptive/objective guidance in the use of FMs;
  • FMs in a certification context;
  • “lightweight” or usable FMs;
  • formal approaches to safety and security-related issues;
  • requirements formalization, formal specification, and verification;
  • performance analysis based on formal approaches;
  • case studies developed/analyzed with formal approaches;
  • success stories and/or ability of FMs to handle real-world problems;
  • experimental validation;
  • application experiences.

We invite you to submit:

  • Full papers that must describe authors’ original research work and results.
  • Case study papers that should identify lessons learned, validate theoretical results (such as scalability of methods) or provide specific motivation for further research and development.
  • Research ideas: FormaliSE encourages the submissions of new research ideas in order to stimulate discussions at the conference.
  • Full and case study papers are limited to 10 pages, including all text, figures, tables, and appendices, while research ideas papers are limited to 4 pages.

Papers must conform to the IEEE Conference Proceedings Formatting Guidelines (title in 24pt font and full text in 10pt type, LaTEX users must use \documentclass[10pt,conference]{IEEEtran} without including the compsoc or compsocconf option). See for details: http://www.ieee.org/conferences_events/conferences/publishing/templates.html.

Papers must be unpublished original work and should not be under review or submitted elsewhere while being under consideration. PC members will review all submissions. Papers will be judged on the basis of their clarity, relevance, originality, and contribution to the field. Submissions must be in English and uploaded in PDF format through the conference submission website at the following URL: https://easychair.org/conferences/?conf=formalise2019.

All accepted publications are published as part of the ICSE 2019 Proceedings in the ACM and IEEE Digital Libraries. The official publication date of the workshop proceedings is the date the proceedings are made available in the ACM Digital Library. The official publication date affects the deadline for any patent filings related to published work. Purchase of additional pages in the proceedings is not allowed. Authors of accepted papers must register and present their paper at the conference.

Accepted Papers

Title
A Generalized Program Verification Workflow Based on Loop Elimination and SA Form
FormaliSE
A Proof-Producing Translator for Verilog Development in HOL
FormaliSE
A Vision for Helping Developers Use APIs by Leveraging Temporal Patterns
FormaliSE
Clock Reduction in Timed Automata while Preserving Design Parameters
FormaliSE
Epistemic Model Checking of Distributed Commit Protocols with Byzantine faults
FormaliSE
FASTEN: An Open Extensible Framework to Experiment with Formal Specification Approaches - Using Language Engineering to Develop a Multi-Paradigm Specification Environment for NuSMV
FormaliSE
Keynote presentation: The Benefits of (having doubts about) Formal Methods
FormaliSE
Modular Synthesis of Verified Verifiers of Computation with STV Algorithms
FormaliSE
On the Formalization of Importance Measures using HOL Theorem Proving
FormaliSE
Parallelizable Reachability Analysis Algorithms for Feed-Forward Neural Networks
FormaliSE
Rigorous Design and Deployment of IoT Applications
FormaliSE
Static Analysis for Worst-Case Battery Utilization
FormaliSE
Towards Sampling and Simulation-Based Analysis of Featured Weighted Automata
FormaliSE
Verifying Channel Communication Correctness for a Multi-Core Cooperatively Scheduled Runtime Using CSP
FormaliSE